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Using Generics

To use a module that employs VHDL generics or Verilog parameters, you must pass the appropriate generic values when instantiating the module. If you wish to use the default values defined in the module, you can omit the generic connections.

When using the imodule() function, you pass generic values as keyword arguments alongside the port connections. The order of the arguments does not matter.

imodule(
    [generic connections],
    ...
    [port connections]
)

Consider the following port information for a module named generic_wrapper.sc that uses a generic variable W:

# generic_wrapper.sc         
generic(W=4)
inport("clk", "reset")
outport("count[W]")

There are two primary ways to include this module in another .sc file:

1. Passing a specific value for the generic:

To set W to 8, instantiate the module like this:

imodule('generic_wrapper.sc',
    W = 8,

    clk = clk,
    reset = reset,
    count = count
)

2. Using the default value:

If you omit W, the default value of 4 is used. You can also explicitly pass 4 if you prefer.

imodule('generic_wrapper.sc',
    clk = clk,
    reset = reset,
    count = count
)
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